SiTime chorus clock generator, dimensions 4mmX4mm
Higher levels of integration have always played a key role in advancing computing platforms of all types, increasing performance and efficiency while reducing power, complexity, and cost. That being said, an area of circuit design that has perhaps not been well integrated over the years is clock timing solutions. But that changes with the introduction of SiTime's Chorus family of clock generators targeted at rapidly evolving AI data centers and data center networking.
Clock timing circuits are specialized support features in modern device, server, or workstation designs. These are a kind of heartbeat for the processor, driving the core frequency and keeping it in sync with data flow and the rest of the circuit. Historically, complex circuits required multiple different types of timing products, such as resonators and oscillators, to drive clock sources into buffers and generators for clock replication, division, and multiplication. With the recent acquisition of Aura Semiconductor, SiTime is now able to integrate all these technologies into a single device, based on its in-house MEMS resonator technology and Aura's clock synthesis technology.
SiTime Chorus offers a new level of integration
Previously, high-level clock timing solutions looked like this: Each system-on-chip device required its own clock source.
Overview of legacy clock timing solutions for computing platforms
Each instance of “XO” represented here is a separate timing solution driven by the crystal oscillator of each processor or IO device, for example in an AI server application.
Using the SiTime Chorus clock generator, a high-level timing solution looks like this…
SiTime Chorus handles clock timing and generation for multiple processors and chips in your compute … [+]
Seeing is believing, and as you can see, this simplified circuit design complete timing solution is integrated into a single SiTime Chorus clock generator, reducing board complexity, area, power consumption, and has been reduced by multiple potential points. Failure. SiTime claims that Chorus can deliver up to 10x better resiliency, better stability, and lower phase jitter (clock deviation), all in a single 4mm x 4mm package. The clock timing circuit design for engineers has also been significantly improved, with the company stating that the Chorus clock generator can offer as much as 6 weeks of advantage in his t0 time on the market.
Piyush Sevalia – SiTime Executive Vice President of Marketing
“AI is driving a huge need for higher data throughput and lower power consumption in data centers, and SiTime is uniquely positioned to help address these issues,” said SiTime Marketing Executive. said Piyush Sevariya, Vice President. “Before Chorus, hardware designers had to use separate product types such as clocks, oscillators, and resonators, resulting in poor performance. Chorus solves these problems. This is another example of how we are transforming the timing market with our unique approach.”
SiTime targets Chorus for key applications in modern AI data centers, including smart NICs, PAM-4 400-800Gbps high-speed communication links, and enterprise switching applications.
SiTime's Chorus family of clock generators is currently sampling to strategic customers, with general sampling expected later this year. Overall, Chorus seems like a win-win for AI system design engineers who want a greener, more reliable, and application-ready precision timing solution.
